RFM50 100mW SOC transceiver

RFM50 100mW SOC transceiver

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the purpose of this RFM50 spec covers mainly for the hardware and RF parameter info of the module, for MCU and software info please refer to RF50 chip data sheets, for RFM50กฏ demo Please refer to RF(M)50 demo kit


General Introduction
RFM50 module series’ design is based on the high performance RF50 SoC chip, It include a CIP-51 core‘ MCU and 100mW transceiver. It operate at 433/470/868/915 MHz ISM band, comply with FCC, ETSI regulation.
Ultra Low Power: 0.9 to 3.6 V Operation
-Typical sleep mode current < 0.1 μA; retains state and RAM contents over full supply range; fast wakeup of < 2 μs
-Less than 600 nA with RTC running
-Less than 1 μA with RTC running and radio state retained
-On-chip dc-dc converter allows operation down to 0.9 V.
-Two built-in brown-out detectors cover sleep and active modes
10-Bit Analog to Digital Converter
-Up to 300 ksps
-Up to 18 external inputs
-External pin or internal VREF (no external capacitor required)
-Built-in temperature sensor
-External conversion start input option
-Autonomous burst mode with 16-bit automatic averaging accumulator
Dual Comparators
-Programmable hysteresis and response time
-Configurable as interrupt or reset source
-Low current (< 0.5 μA)
On-Chip Debug
-On-chip debug circuitry facilitates full-speed, non-intrusive in-system debug (No emulator required)
-Provides breakpoints, single stepping
-Inspect/modify memory and registers
-Complete development kit
High-Speed 8051 μC Core
-Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
-Up to 25 MIPS throughput with 25 MHz clock
-Expanded interrupt handler
-4352 bytes internal data RAM (256 + 4096)
-64 kB Flash; In-system programmable in 1024-byte sectors—1024 bytes are reserved in the 64 kB devices
-Frequency range = 433,470,868,915 MHz ISM Band
-Sensitivity = –121 dBm
-FSK, GFSK, and OOK modulation
-Max output power = +20 dBm
-RF power consumption
- 18.5mA receive
-18 mA @+1 dBm transmit
- 40mA @+13 dBm transmit
- 100mA @+20 dBm transmit
-Data rate = 0.123 to 256 kbps
-Auto-frequency calibration (AFC)
- transmit/receive switch control
-Programmable packet handler
-TX and RX 64 byte FIFOs
-Frequency hopping capability
-On-chip crystal tuning
Digital Peripherals
-19 or 16 port I/O plus 3 GPIO pins; Hardware enhanced UART, SPI, and I2C serial ports available concurrently
-Low power 32-bit SmaRTClock
-Four general purpose 16-bit counter/timers; six channel programmable counter array (PCA)
Clock Sources
-Precision internal oscillators: 24.5 MHz with ±2% accuracy supports UART operation; spread-spectrum mode for reduced EMI; Low power 20 MHz internal oscillator
-External oscillator: Crystal, RC, C, CMOS clock
-SmaRTClock oscillator: 32.768 kHz crystal or self-oscillate
-Can switch between clock sources on-the-fly; useful in power saving modes and in implementing various power saving modes
I/O Port
-19 or 20 port I/O (5 V tolerant except for GPIO_2)
-30-pin SMD (11x25X2.0 mm)


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